An integrated circuit may contain a planar extended drain metal oxide semiconductor (MOS) transistor with a buried drift region, for example to provide an operating voltage above the dielectric strength of the gate dielectric layer in the MOS transistor. It may be desirable to form a low resistance drain portion connection between the buried drift region and the drain contact, a lightly doped channel portion link between the buried drift region and the channel of the MOS transistor, and a lightly doped isolation link between the buried drift region and the top surface of the substrate of the integrated circuit which electrically isolates the source and body of the MOS transistor from the substrate. It may further be desirable to minimize the number of photolithographic and ion implant operations in the fabrication sequence of forming the integrated circuit.